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Add BTI landing pads to the AArch64 SHA2 assembly 

The Arm Branch Target Identification (BTI) extension guards against
branching to an unintended instruction.

To support BTI add the landing pad instructions to the SHA2 functions.
These are from the hint space so are a nop on hardware that lacks BTI
support or if BTI isn't enabled.

Reviewed-by: Allan Jude <allan@klarasystems.com>
Reviewed-by: Brian Behlendorf <behlendorf1@llnl.gov>
Reviewed-by: Tino Reichardt <milky-zfs@mcmilk.de>
Signed-off-by: Andrew Turner <andrew.turner4@arm.com>
Closes #14862
Closes #15339
This commit is contained in:
Andrew Turner 2023-10-03 23:12:36 +01:00 committed by GitHub
parent eb955f6e93
commit f795e90a11
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2 changed files with 5 additions and 0 deletions
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3
module/icp/asm-aarch64/sha2/sha256-armv8.S
View File

@ -49,6 +49,7 @@
.type zfs_sha256_block_armv7,%function
.align 6
zfs_sha256_block_armv7:
hint #34 // bti c
stp x29,x30,[sp,#-128]!
add x29,sp,#0
@ -1015,6 +1016,7 @@ zfs_sha256_block_armv7:
.type zfs_sha256_block_armv8,%function
.align 6
zfs_sha256_block_armv8:
hint #34 // bti c
.Lv8_entry:
stp x29,x30,[sp,#-16]!
add x29,sp,#0
@ -1155,6 +1157,7 @@ zfs_sha256_block_armv8:
.type zfs_sha256_block_neon,%function
.align 4
zfs_sha256_block_neon:
hint #34 // bti c
.Lneon_entry:
stp x29, x30, [sp, #-16]!
mov x29, sp

2
module/icp/asm-aarch64/sha2/sha512-armv8.S
View File

@ -73,6 +73,7 @@
.type zfs_sha512_block_armv7,%function
.align 6
zfs_sha512_block_armv7:
hint #34 // bti c
stp x29,x30,[sp,#-128]!
add x29,sp,#0
@ -1040,6 +1041,7 @@ zfs_sha512_block_armv7:
.type zfs_sha512_block_armv8,%function
.align 6
zfs_sha512_block_armv8:
hint #34 // bti c
.Lv8_entry:
// Armv8.3-A PAuth: even though x30 is pushed to stack it is not popped later
stp x29,x30,[sp,#-16]!