Add support for AVX-512 family of instruction sets
This patch adds compiler and runtime tests (user and kernel) for following instruction sets: avx512f, avx512cd, avx512er, avx512pf, avx512bw, avx512dq, avx512vl, avx512ifma, avx512vbmi. note: Linux support for AVX-512F (Foundation) instruction set started with linux v3.15 Signed-off-by: Gvozden Neskovic <neskovic@gmail.com> Signed-off-by: Brian Behlendorf <behlendorf1@llnl.gov> Issue #4952
This commit is contained in:
Gvozden Neskovic
Brian Behlendorf
parent
6d836e6f8b
commit
32ffaa3de5
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@ -12,6 +12,15 @@ AC_DEFUN([ZFS_AC_CONFIG_ALWAYS_TOOLCHAIN_SIMD], [
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ZFS_AC_CONFIG_TOOLCHAIN_CAN_BUILD_SSE4_2
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ZFS_AC_CONFIG_TOOLCHAIN_CAN_BUILD_AVX
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ZFS_AC_CONFIG_TOOLCHAIN_CAN_BUILD_AVX2
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ZFS_AC_CONFIG_TOOLCHAIN_CAN_BUILD_AVX512F
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ZFS_AC_CONFIG_TOOLCHAIN_CAN_BUILD_AVX512CD
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ZFS_AC_CONFIG_TOOLCHAIN_CAN_BUILD_AVX512DQ
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ZFS_AC_CONFIG_TOOLCHAIN_CAN_BUILD_AVX512BW
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ZFS_AC_CONFIG_TOOLCHAIN_CAN_BUILD_AVX512IFMA
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ZFS_AC_CONFIG_TOOLCHAIN_CAN_BUILD_AVX512VBMI
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ZFS_AC_CONFIG_TOOLCHAIN_CAN_BUILD_AVX512PF
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ZFS_AC_CONFIG_TOOLCHAIN_CAN_BUILD_AVX512ER
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ZFS_AC_CONFIG_TOOLCHAIN_CAN_BUILD_AVX512VL
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;;
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esac
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])
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@ -170,3 +179,183 @@ AC_DEFUN([ZFS_AC_CONFIG_TOOLCHAIN_CAN_BUILD_AVX2], [
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AC_MSG_RESULT([no])
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])
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])
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dnl #
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dnl # ZFS_AC_CONFIG_TOOLCHAIN_CAN_BUILD_AVX512F
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dnl #
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AC_DEFUN([ZFS_AC_CONFIG_TOOLCHAIN_CAN_BUILD_AVX512F], [
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AC_MSG_CHECKING([whether host toolchain supports AVX512F])
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AC_LINK_IFELSE([AC_LANG_SOURCE([
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[
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void main()
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{
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__asm__ __volatile__("vpandd %zmm0,%zmm1,%zmm2");
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}
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]])], [
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AC_MSG_RESULT([yes])
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AC_DEFINE([HAVE_AVX512F], 1, [Define if host toolchain supports AVX512F])
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], [
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AC_MSG_RESULT([no])
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])
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])
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dnl #
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dnl # ZFS_AC_CONFIG_TOOLCHAIN_CAN_BUILD_AVX512CD
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dnl #
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AC_DEFUN([ZFS_AC_CONFIG_TOOLCHAIN_CAN_BUILD_AVX512CD], [
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AC_MSG_CHECKING([whether host toolchain supports AVX512CD])
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AC_LINK_IFELSE([AC_LANG_SOURCE([
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[
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void main()
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{
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__asm__ __volatile__("vplzcntd %zmm0,%zmm1");
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}
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]])], [
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AC_MSG_RESULT([yes])
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AC_DEFINE([HAVE_AVX512CD], 1, [Define if host toolchain supports AVX512CD])
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], [
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AC_MSG_RESULT([no])
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])
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])
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dnl #
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dnl # ZFS_AC_CONFIG_TOOLCHAIN_CAN_BUILD_AVX512DQ
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dnl #
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AC_DEFUN([ZFS_AC_CONFIG_TOOLCHAIN_CAN_BUILD_AVX512DQ], [
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AC_MSG_CHECKING([whether host toolchain supports AVX512DQ])
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AC_LINK_IFELSE([AC_LANG_SOURCE([
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[
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void main()
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{
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__asm__ __volatile__("vandpd %zmm0,%zmm1,%zmm2");
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}
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]])], [
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AC_MSG_RESULT([yes])
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AC_DEFINE([HAVE_AVX512DQ], 1, [Define if host toolchain supports AVX512DQ])
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], [
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AC_MSG_RESULT([no])
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])
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])
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dnl #
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dnl # ZFS_AC_CONFIG_TOOLCHAIN_CAN_BUILD_AVX512BW
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dnl #
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AC_DEFUN([ZFS_AC_CONFIG_TOOLCHAIN_CAN_BUILD_AVX512BW], [
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AC_MSG_CHECKING([whether host toolchain supports AVX512BW])
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AC_LINK_IFELSE([AC_LANG_SOURCE([
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[
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void main()
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{
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__asm__ __volatile__("vpshufb %zmm0,%zmm1,%zmm2");
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}
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]])], [
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AC_MSG_RESULT([yes])
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AC_DEFINE([HAVE_AVX512BW], 1, [Define if host toolchain supports AVX512BW])
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], [
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AC_MSG_RESULT([no])
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])
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])
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dnl #
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dnl # ZFS_AC_CONFIG_TOOLCHAIN_CAN_BUILD_AVX512IFMA
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dnl #
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AC_DEFUN([ZFS_AC_CONFIG_TOOLCHAIN_CAN_BUILD_AVX512IFMA], [
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AC_MSG_CHECKING([whether host toolchain supports AVX512IFMA])
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AC_LINK_IFELSE([AC_LANG_SOURCE([
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[
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void main()
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{
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__asm__ __volatile__("vpmadd52luq %zmm0,%zmm1,%zmm2");
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}
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]])], [
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AC_MSG_RESULT([yes])
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AC_DEFINE([HAVE_AVX512IFMA], 1, [Define if host toolchain supports AVX512IFMA])
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], [
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AC_MSG_RESULT([no])
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])
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])
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dnl #
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dnl # ZFS_AC_CONFIG_TOOLCHAIN_CAN_BUILD_AVX512VBMI
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dnl #
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AC_DEFUN([ZFS_AC_CONFIG_TOOLCHAIN_CAN_BUILD_AVX512VBMI], [
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AC_MSG_CHECKING([whether host toolchain supports AVX512VBMI])
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AC_LINK_IFELSE([AC_LANG_SOURCE([
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[
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void main()
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{
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__asm__ __volatile__("vpermb %zmm0,%zmm1,%zmm2");
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}
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]])], [
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AC_MSG_RESULT([yes])
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AC_DEFINE([HAVE_AVX512VBMI], 1, [Define if host toolchain supports AVX512VBMI])
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], [
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AC_MSG_RESULT([no])
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])
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])
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dnl #
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dnl # ZFS_AC_CONFIG_TOOLCHAIN_CAN_BUILD_AVX512PF
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dnl #
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AC_DEFUN([ZFS_AC_CONFIG_TOOLCHAIN_CAN_BUILD_AVX512PF], [
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AC_MSG_CHECKING([whether host toolchain supports AVX512PF])
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AC_LINK_IFELSE([AC_LANG_SOURCE([
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[
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void main()
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{
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__asm__ __volatile__("vgatherpf0dps (%rsi,%zmm0,4){%k1}");
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}
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]])], [
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AC_MSG_RESULT([yes])
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AC_DEFINE([HAVE_AVX512PF], 1, [Define if host toolchain supports AVX512PF])
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], [
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AC_MSG_RESULT([no])
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])
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])
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dnl #
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dnl # ZFS_AC_CONFIG_TOOLCHAIN_CAN_BUILD_AVX512ER
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dnl #
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AC_DEFUN([ZFS_AC_CONFIG_TOOLCHAIN_CAN_BUILD_AVX512ER], [
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AC_MSG_CHECKING([whether host toolchain supports AVX512ER])
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AC_LINK_IFELSE([AC_LANG_SOURCE([
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[
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void main()
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{
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__asm__ __volatile__("vexp2pd %zmm0,%zmm1");
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}
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]])], [
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AC_MSG_RESULT([yes])
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AC_DEFINE([HAVE_AVX512ER], 1, [Define if host toolchain supports AVX512ER])
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], [
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AC_MSG_RESULT([no])
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])
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])
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dnl #
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dnl # ZFS_AC_CONFIG_TOOLCHAIN_CAN_BUILD_AVX512VL
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dnl #
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AC_DEFUN([ZFS_AC_CONFIG_TOOLCHAIN_CAN_BUILD_AVX512VL], [
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AC_MSG_CHECKING([whether host toolchain supports AVX512VL])
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AC_LINK_IFELSE([AC_LANG_SOURCE([
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[
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void main()
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{
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__asm__ __volatile__("vpabsq %zmm0,%zmm1");
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}
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]])], [
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AC_MSG_RESULT([yes])
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AC_DEFINE([HAVE_AVX512VL], 1, [Define if host toolchain supports AVX512VL])
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], [
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AC_MSG_RESULT([no])
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])
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])
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@ -43,10 +43,25 @@
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* zfs_ssse3_available()
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* zfs_sse4_1_available()
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* zfs_sse4_2_available()
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*
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* zfs_avx_available()
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* zfs_avx2_available()
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*
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* zfs_bmi1_available()
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* zfs_bmi2_available()
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*
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* zfs_avx512f_available()
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* zfs_avx512cd_available()
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* zfs_avx512er_available()
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* zfs_avx512pf_available()
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* zfs_avx512bw_available()
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* zfs_avx512dq_available()
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* zfs_avx512vl_available()
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* zfs_avx512ifma_available()
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* zfs_avx512vbmi_available()
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*
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* NOTE(AVX-512VL): If using AVX-512 instructions with 128Bit registers
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* also add zfs_avx512vl_available() to feature check.
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*/
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#ifndef _SIMD_X86_H
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@ -124,7 +139,16 @@ typedef enum cpuid_inst_sets {
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AVX,
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AVX2,
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BMI1,
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BMI2
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BMI2,
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AVX512F,
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AVX512CD,
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AVX512DQ,
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AVX512BW,
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AVX512IFMA,
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AVX512VBMI,
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AVX512PF,
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AVX512ER,
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AVX512VL
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} cpuid_inst_sets_t;
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/*
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@ -132,11 +156,21 @@ typedef enum cpuid_inst_sets {
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*/
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typedef struct cpuid_feature_desc {
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uint32_t leaf; /* CPUID leaf */
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uint32_t subleaf; /* CPUID subleaf */
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uint32_t subleaf; /* CPUID sub-leaf */
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uint32_t flag; /* bit mask of the feature */
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cpuid_regs_t reg; /* which CPUID return register to test */
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} cpuid_feature_desc_t;
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#define _AVX512F_BIT (1U << 16)
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#define _AVX512CD_BIT (_AVX512F_BIT | (1U << 28))
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#define _AVX512DQ_BIT (_AVX512F_BIT | (1U << 17))
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#define _AVX512BW_BIT (_AVX512F_BIT | (1U << 30))
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#define _AVX512IFMA_BIT (_AVX512F_BIT | (1U << 21))
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#define _AVX512VBMI_BIT (1U << 1) /* AVX512F_BIT is on another leaf */
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#define _AVX512PF_BIT (_AVX512F_BIT | (1U << 26))
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#define _AVX512ER_BIT (_AVX512F_BIT | (1U << 27))
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#define _AVX512VL_BIT (1U << 31) /* if used also check other levels */
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/*
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* Descriptions of supported instruction sets
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*/
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@ -151,7 +185,16 @@ static const cpuid_feature_desc_t cpuid_features[] = {
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[AVX] = {1U, 0U, 1U << 28, ECX },
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[AVX2] = {7U, 0U, 1U << 5, EBX },
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[BMI1] = {7U, 0U, 1U << 3, EBX },
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[BMI2] = {7U, 0U, 1U << 8, EBX }
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[BMI2] = {7U, 0U, 1U << 8, EBX },
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[AVX512F] = {7U, 0U, _AVX512F_BIT, EBX },
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[AVX512CD] = {7U, 0U, _AVX512CD_BIT, EBX },
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[AVX512DQ] = {7U, 0U, _AVX512DQ_BIT, EBX },
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[AVX512BW] = {7U, 0U, _AVX512BW_BIT, EBX },
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[AVX512IFMA] = {7U, 0U, _AVX512IFMA_BIT, EBX },
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[AVX512VBMI] = {7U, 0U, _AVX512VBMI_BIT, ECX },
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[AVX512PF] = {7U, 0U, _AVX512PF_BIT, EBX },
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[AVX512ER] = {7U, 0U, _AVX512ER_BIT, EBX },
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[AVX512VL] = {7U, 0U, _AVX512ER_BIT, EBX }
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};
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/*
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@ -187,15 +230,15 @@ __cpuid_check_feature(const cpuid_feature_desc_t *desc)
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*/
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__cpuid_count(desc->leaf, desc->subleaf,
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r[EAX], r[EBX], r[ECX], r[EDX]);
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return (!!(r[desc->reg] & desc->flag));
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return ((r[desc->reg] & desc->flag) == desc->flag);
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}
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return (B_FALSE);
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}
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#define CPUID_FEATURE_CHECK(name, id) \
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static inline boolean_t \
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__cpuid_has_ ## name(void)\
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{ \
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#define CPUID_FEATURE_CHECK(name, id) \
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static inline boolean_t \
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__cpuid_has_ ## name(void) \
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{ \
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return (__cpuid_check_feature(&cpuid_features[id])); \
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}
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@ -213,16 +256,25 @@ CPUID_FEATURE_CHECK(avx2, AVX2);
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CPUID_FEATURE_CHECK(osxsave, OSXSAVE);
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CPUID_FEATURE_CHECK(bmi1, BMI1);
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CPUID_FEATURE_CHECK(bmi2, BMI2);
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CPUID_FEATURE_CHECK(avx512f, AVX512F);
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CPUID_FEATURE_CHECK(avx512cd, AVX512CD);
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CPUID_FEATURE_CHECK(avx512dq, AVX512DQ);
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CPUID_FEATURE_CHECK(avx512bw, AVX512BW);
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CPUID_FEATURE_CHECK(avx512ifma, AVX512IFMA);
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CPUID_FEATURE_CHECK(avx512vbmi, AVX512VBMI);
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CPUID_FEATURE_CHECK(avx512pf, AVX512PF);
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CPUID_FEATURE_CHECK(avx512er, AVX512ER);
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CPUID_FEATURE_CHECK(avx512vl, AVX512VL);
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#endif /* !defined(_KERNEL) */
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/*
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* Detect ymm register set support
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* Detect register set support
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*/
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static inline boolean_t
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__ymm_enabled(void)
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__simd_state_enabled(const uint64_t state)
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{
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static const uint64_t XSTATE_SSE_AVX = 0x2 | 0x4;
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boolean_t has_osxsave;
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uint64_t xcr0;
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@ -238,9 +290,16 @@ __ymm_enabled(void)
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return (B_FALSE);
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xcr0 = xgetbv(0);
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return ((xcr0 & XSTATE_SSE_AVX) == XSTATE_SSE_AVX);
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return ((xcr0 & state) == state);
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}
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#define _XSTATE_SSE_AVX (0x2 | 0x4)
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#define _XSTATE_AVX512 (0xE0 | _XSTATE_SSE_AVX)
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#define __ymm_enabled() __simd_state_enabled(_XSTATE_SSE_AVX)
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#define __zmm_enabled() __simd_state_enabled(_XSTATE_AVX512)
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/*
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* Check if SSE instruction set is available
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*/
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@ -383,6 +442,168 @@ zfs_bmi2_available(void)
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#endif
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}
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/*
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* AVX-512 family of instruction sets:
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*
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* AVX512F Foundation
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* AVX512CD Conflict Detection Instructions
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* AVX512ER Exponential and Reciprocal Instructions
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* AVX512PF Prefetch Instructions
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*
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* AVX512BW Byte and Word Instructions
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* AVX512DQ Double-word and Quadword Instructions
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* AVX512VL Vector Length Extensions
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*
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* AVX512IFMA Integer Fused Multiply Add (Not supported by kernel 4.4)
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* AVX512VBMI Vector Byte Manipulation Instructions
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*/
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/* Check if AVX512F instruction set is available */
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static inline boolean_t
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zfs_avx512f_available(void)
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{
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boolean_t has_avx512 = B_FALSE;
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#if defined(_KERNEL) && defined(X86_FEATURE_AVX512F)
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has_avx512 = !!boot_cpu_has(X86_FEATURE_AVX512F);
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#elif !defined(_KERNEL)
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has_avx512 = __cpuid_has_avx512f();
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#endif
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return (has_avx512 && __zmm_enabled());
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}
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/* Check if AVX512CD instruction set is available */
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static inline boolean_t
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zfs_avx512cd_available(void)
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{
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boolean_t has_avx512 = B_FALSE;
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#if defined(_KERNEL) && defined(X86_FEATURE_AVX512CD)
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has_avx512 = boot_cpu_has(X86_FEATURE_AVX512F) &&
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boot_cpu_has(X86_FEATURE_AVX512CD);
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#elif !defined(_KERNEL)
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has_avx512 = __cpuid_has_avx512cd();
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#endif
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return (has_avx512 && __zmm_enabled());
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}
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/* Check if AVX512ER instruction set is available */
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static inline boolean_t
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zfs_avx512er_available(void)
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{
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boolean_t has_avx512 = B_FALSE;
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#if defined(_KERNEL) && defined(X86_FEATURE_AVX512ER)
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has_avx512 = boot_cpu_has(X86_FEATURE_AVX512F) &&
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boot_cpu_has(X86_FEATURE_AVX512ER);
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#elif !defined(_KERNEL)
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has_avx512 = __cpuid_has_avx512er();
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#endif
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return (has_avx512 && __zmm_enabled());
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}
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/* Check if AVX512PF instruction set is available */
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static inline boolean_t
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zfs_avx512pf_available(void)
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{
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boolean_t has_avx512 = B_FALSE;
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#if defined(_KERNEL) && defined(X86_FEATURE_AVX512PF)
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has_avx512 = boot_cpu_has(X86_FEATURE_AVX512F) &&
|
||||
boot_cpu_has(X86_FEATURE_AVX512PF);
|
||||
#elif !defined(_KERNEL)
|
||||
has_avx512 = __cpuid_has_avx512pf();
|
||||
#endif
|
||||
|
||||
return (has_avx512 && __zmm_enabled());
|
||||
}
|
||||
|
||||
/* Check if AVX512BW instruction set is available */
|
||||
static inline boolean_t
|
||||
zfs_avx512bw_available(void)
|
||||
{
|
||||
boolean_t has_avx512 = B_FALSE;
|
||||
|
||||
#if defined(_KERNEL) && defined(X86_FEATURE_AVX512BW)
|
||||
has_avx512 = boot_cpu_has(X86_FEATURE_AVX512F) &&
|
||||
boot_cpu_has(X86_FEATURE_AVX512BW);
|
||||
#elif !defined(_KERNEL)
|
||||
has_avx512 = __cpuid_has_avx512bw();
|
||||
#endif
|
||||
|
||||
return (has_avx512 && __zmm_enabled());
|
||||
}
|
||||
|
||||
/* Check if AVX512DQ instruction set is available */
|
||||
static inline boolean_t
|
||||
zfs_avx512dq_available(void)
|
||||
{
|
||||
boolean_t has_avx512 = B_FALSE;
|
||||
|
||||
#if defined(_KERNEL) && defined(X86_FEATURE_AVX512DQ)
|
||||
has_avx512 = boot_cpu_has(X86_FEATURE_AVX512F) &&
|
||||
boot_cpu_has(X86_FEATURE_AVX512DQ);
|
||||
#elif !defined(_KERNEL)
|
||||
has_avx512 = __cpuid_has_avx512dq();
|
||||
#endif
|
||||
|
||||
return (has_avx512 && __zmm_enabled());
|
||||
}
|
||||
|
||||
/* Check if AVX512VL instruction set is available */
|
||||
static inline boolean_t
|
||||
zfs_avx512vl_available(void)
|
||||
{
|
||||
boolean_t has_avx512 = B_FALSE;
|
||||
|
||||
#if defined(_KERNEL) && defined(X86_FEATURE_AVX512VL)
|
||||
has_avx512 = boot_cpu_has(X86_FEATURE_AVX512F) &&
|
||||
boot_cpu_has(X86_FEATURE_AVX512VL);
|
||||
#elif !defined(_KERNEL)
|
||||
has_avx512 = __cpuid_has_avx512vl();
|
||||
#endif
|
||||
|
||||
return (has_avx512 && __zmm_enabled());
|
||||
}
|
||||
|
||||
/* Check if AVX512IFMA instruction set is available */
|
||||
static inline boolean_t
|
||||
zfs_avx512ifma_available(void)
|
||||
{
|
||||
boolean_t has_avx512 = B_FALSE;
|
||||
|
||||
#if defined(_KERNEL) && defined(X86_FEATURE_AVX512IFMA)
|
||||
has_avx512 = boot_cpu_has(X86_FEATURE_AVX512F) &&
|
||||
boot_cpu_has(X86_FEATURE_AVX512IFMA);
|
||||
#elif !defined(_KERNEL)
|
||||
has_avx512 = __cpuid_has_avx512ifma();
|
||||
#endif
|
||||
|
||||
return (has_avx512 && __zmm_enabled());
|
||||
}
|
||||
|
||||
/* Check if AVX512VBMI instruction set is available */
|
||||
static inline boolean_t
|
||||
zfs_avx512vbmi_available(void)
|
||||
{
|
||||
boolean_t has_avx512 = B_FALSE;
|
||||
|
||||
#if defined(_KERNEL) && defined(X86_FEATURE_AVX512VBMI)
|
||||
has_avx512 = boot_cpu_has(X86_FEATURE_AVX512F) &&
|
||||
boot_cpu_has(X86_FEATURE_AVX512VBMI);
|
||||
#elif !defined(_KERNEL)
|
||||
has_avx512 = __cpuid_has_avx512f() &&
|
||||
__cpuid_has_avx512vbmi();
|
||||
#endif
|
||||
|
||||
return (has_avx512 && __zmm_enabled());
|
||||
}
|
||||
|
||||
#endif /* defined(__x86) */
|
||||
|
||||
#endif /* _SIMD_X86_H */
|
||||
|
|
|
|||
Loading…
Reference in New Issue