2016-07-06 11:42:04 +00:00
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/*
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* CDDL HEADER START
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*
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* The contents of this file are subject to the terms of the
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* Common Development and Distribution License (the "License").
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* You may not use this file except in compliance with the License.
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*
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* You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
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* or http://www.opensolaris.org/os/licensing.
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* See the License for the specific language governing permissions
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* and limitations under the License.
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*
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* When distributing Covered Code, include this CDDL HEADER in each
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* file and include the License file at usr/src/OPENSOLARIS.LICENSE.
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* If applicable, add the following below this CDDL HEADER, with the
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* fields enclosed by brackets "[]" replaced with your own identifying
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* information: Portions Copyright [yyyy] [name of copyright owner]
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*
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* CDDL HEADER END
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*/
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/*
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* Copyright (C) 2016 Gvozden Nešković. All rights reserved.
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*/
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#if defined(__x86_64) && defined(HAVE_AVX512F)
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#include <sys/byteorder.h>
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2017-12-07 18:28:50 +00:00
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#include <sys/frame.h>
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2016-07-06 11:42:04 +00:00
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#include <sys/spa_checksum.h>
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2018-02-16 01:53:18 +00:00
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#include <sys/strings.h>
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2019-09-05 16:34:54 +00:00
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#include <sys/simd.h>
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2016-07-06 11:42:04 +00:00
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#include <zfs_fletcher.h>
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#define __asm __asm__ __volatile__
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2016-09-24 22:56:22 +00:00
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static void
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fletcher_4_avx512f_init(fletcher_4_ctx_t *ctx)
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{
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bzero(ctx->avx512, 4 * sizeof (zfs_fletcher_avx512_t));
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}
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2016-07-06 11:42:04 +00:00
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static void
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2016-09-24 22:56:22 +00:00
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fletcher_4_avx512f_fini(fletcher_4_ctx_t *ctx, zio_cksum_t *zcp)
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2016-07-06 11:42:04 +00:00
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{
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2016-09-24 22:56:22 +00:00
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static const uint64_t
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CcA[] = { 0, 0, 1, 3, 6, 10, 15, 21 },
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CcB[] = { 28, 36, 44, 52, 60, 68, 76, 84 },
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DcA[] = { 0, 0, 0, 1, 4, 10, 20, 35 },
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DcB[] = { 56, 84, 120, 164, 216, 276, 344, 420 },
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DcC[] = { 448, 512, 576, 640, 704, 768, 832, 896 };
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uint64_t A, B, C, D;
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uint64_t i;
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2016-07-06 11:42:04 +00:00
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2016-09-24 22:56:22 +00:00
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A = ctx->avx512[0].v[0];
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B = 8 * ctx->avx512[1].v[0];
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C = 64 * ctx->avx512[2].v[0] - CcB[0] * ctx->avx512[1].v[0];
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D = 512 * ctx->avx512[3].v[0] - DcC[0] * ctx->avx512[2].v[0] +
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DcB[0] * ctx->avx512[1].v[0];
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for (i = 1; i < 8; i++) {
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A += ctx->avx512[0].v[i];
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B += 8 * ctx->avx512[1].v[i] - i * ctx->avx512[0].v[i];
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C += 64 * ctx->avx512[2].v[i] - CcB[i] * ctx->avx512[1].v[i] +
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CcA[i] * ctx->avx512[0].v[i];
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D += 512 * ctx->avx512[3].v[i] - DcC[i] * ctx->avx512[2].v[i] +
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DcB[i] * ctx->avx512[1].v[i] - DcA[i] * ctx->avx512[0].v[i];
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}
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ZIO_SET_CHECKSUM(zcp, A, B, C, D);
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}
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#define FLETCHER_4_AVX512_RESTORE_CTX(ctx) \
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{ \
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__asm("vmovdqu64 %0, %%zmm0" :: "m" ((ctx)->avx512[0])); \
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__asm("vmovdqu64 %0, %%zmm1" :: "m" ((ctx)->avx512[1])); \
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__asm("vmovdqu64 %0, %%zmm2" :: "m" ((ctx)->avx512[2])); \
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__asm("vmovdqu64 %0, %%zmm3" :: "m" ((ctx)->avx512[3])); \
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}
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#define FLETCHER_4_AVX512_SAVE_CTX(ctx) \
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{ \
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__asm("vmovdqu64 %%zmm0, %0" : "=m" ((ctx)->avx512[0])); \
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__asm("vmovdqu64 %%zmm1, %0" : "=m" ((ctx)->avx512[1])); \
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__asm("vmovdqu64 %%zmm2, %0" : "=m" ((ctx)->avx512[2])); \
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__asm("vmovdqu64 %%zmm3, %0" : "=m" ((ctx)->avx512[3])); \
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2016-07-06 11:42:04 +00:00
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}
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static void
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2016-09-24 22:56:22 +00:00
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fletcher_4_avx512f_native(fletcher_4_ctx_t *ctx, const void *buf, uint64_t size)
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2016-07-06 11:42:04 +00:00
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{
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const uint32_t *ip = buf;
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const uint32_t *ipend = (uint32_t *)((uint8_t *)ip + size);
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2016-09-24 22:56:22 +00:00
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kfpu_begin();
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FLETCHER_4_AVX512_RESTORE_CTX(ctx);
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2016-07-06 11:42:04 +00:00
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for (; ip < ipend; ip += 8) {
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__asm("vpmovzxdq %0, %%zmm4"::"m" (*ip));
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__asm("vpaddq %zmm4, %zmm0, %zmm0");
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__asm("vpaddq %zmm0, %zmm1, %zmm1");
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__asm("vpaddq %zmm1, %zmm2, %zmm2");
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__asm("vpaddq %zmm2, %zmm3, %zmm3");
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}
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2016-09-24 22:56:22 +00:00
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FLETCHER_4_AVX512_SAVE_CTX(ctx);
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kfpu_end();
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2016-07-06 11:42:04 +00:00
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}
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2017-12-07 18:28:50 +00:00
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STACK_FRAME_NON_STANDARD(fletcher_4_avx512f_native);
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2016-07-06 11:42:04 +00:00
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static void
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2016-09-24 22:56:22 +00:00
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fletcher_4_avx512f_byteswap(fletcher_4_ctx_t *ctx, const void *buf,
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uint64_t size)
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2016-07-06 11:42:04 +00:00
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{
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static const uint64_t byteswap_mask = 0xFFULL;
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const uint32_t *ip = buf;
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const uint32_t *ipend = (uint32_t *)((uint8_t *)ip + size);
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2016-09-24 22:56:22 +00:00
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kfpu_begin();
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FLETCHER_4_AVX512_RESTORE_CTX(ctx);
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2016-07-06 11:42:04 +00:00
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__asm("vpbroadcastq %0, %%zmm8" :: "r" (byteswap_mask));
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__asm("vpsllq $8, %zmm8, %zmm9");
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__asm("vpsllq $16, %zmm8, %zmm10");
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__asm("vpsllq $24, %zmm8, %zmm11");
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for (; ip < ipend; ip += 8) {
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__asm("vpmovzxdq %0, %%zmm5"::"m" (*ip));
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__asm("vpsrlq $24, %zmm5, %zmm6");
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__asm("vpandd %zmm8, %zmm6, %zmm6");
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__asm("vpsrlq $8, %zmm5, %zmm7");
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__asm("vpandd %zmm9, %zmm7, %zmm7");
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__asm("vpord %zmm6, %zmm7, %zmm4");
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__asm("vpsllq $8, %zmm5, %zmm6");
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__asm("vpandd %zmm10, %zmm6, %zmm6");
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__asm("vpord %zmm6, %zmm4, %zmm4");
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__asm("vpsllq $24, %zmm5, %zmm5");
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__asm("vpandd %zmm11, %zmm5, %zmm5");
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__asm("vpord %zmm5, %zmm4, %zmm4");
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__asm("vpaddq %zmm4, %zmm0, %zmm0");
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__asm("vpaddq %zmm0, %zmm1, %zmm1");
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__asm("vpaddq %zmm1, %zmm2, %zmm2");
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__asm("vpaddq %zmm2, %zmm3, %zmm3");
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}
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2016-09-24 22:56:22 +00:00
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FLETCHER_4_AVX512_SAVE_CTX(ctx)
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2016-07-06 11:42:04 +00:00
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kfpu_end();
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}
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2017-12-07 18:28:50 +00:00
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STACK_FRAME_NON_STANDARD(fletcher_4_avx512f_byteswap);
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2016-07-06 11:42:04 +00:00
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static boolean_t
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fletcher_4_avx512f_valid(void)
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{
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2019-07-12 16:31:20 +00:00
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return (kfpu_allowed() && zfs_avx512f_available());
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2016-07-06 11:42:04 +00:00
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}
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const fletcher_4_ops_t fletcher_4_avx512f_ops = {
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2016-07-12 15:50:54 +00:00
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.init_native = fletcher_4_avx512f_init,
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.fini_native = fletcher_4_avx512f_fini,
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.compute_native = fletcher_4_avx512f_native,
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.init_byteswap = fletcher_4_avx512f_init,
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.fini_byteswap = fletcher_4_avx512f_fini,
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2016-07-06 11:42:04 +00:00
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.compute_byteswap = fletcher_4_avx512f_byteswap,
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.valid = fletcher_4_avx512f_valid,
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.name = "avx512f"
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};
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2019-10-30 19:26:14 +00:00
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#if defined(HAVE_AVX512BW)
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static void
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fletcher_4_avx512bw_byteswap(fletcher_4_ctx_t *ctx, const void *buf,
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uint64_t size)
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{
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static const zfs_fletcher_avx512_t mask = {
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.v = { 0xFFFFFFFF00010203, 0xFFFFFFFF08090A0B,
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0xFFFFFFFF00010203, 0xFFFFFFFF08090A0B,
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0xFFFFFFFF00010203, 0xFFFFFFFF08090A0B,
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0xFFFFFFFF00010203, 0xFFFFFFFF08090A0B }
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};
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const uint32_t *ip = buf;
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const uint32_t *ipend = (uint32_t *)((uint8_t *)ip + size);
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kfpu_begin();
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FLETCHER_4_AVX512_RESTORE_CTX(ctx);
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__asm("vmovdqu64 %0, %%zmm5" :: "m" (mask));
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for (; ip < ipend; ip += 8) {
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__asm("vpmovzxdq %0, %%zmm4"::"m" (*ip));
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__asm("vpshufb %zmm5, %zmm4, %zmm4");
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__asm("vpaddq %zmm4, %zmm0, %zmm0");
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__asm("vpaddq %zmm0, %zmm1, %zmm1");
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__asm("vpaddq %zmm1, %zmm2, %zmm2");
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__asm("vpaddq %zmm2, %zmm3, %zmm3");
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}
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FLETCHER_4_AVX512_SAVE_CTX(ctx)
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kfpu_end();
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}
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STACK_FRAME_NON_STANDARD(fletcher_4_avx512bw_byteswap);
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const fletcher_4_ops_t fletcher_4_avx512bw_ops = {
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.init_native = fletcher_4_avx512f_init,
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.fini_native = fletcher_4_avx512f_fini,
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.compute_native = fletcher_4_avx512f_native,
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.init_byteswap = fletcher_4_avx512f_init,
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.fini_byteswap = fletcher_4_avx512f_fini,
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.compute_byteswap = fletcher_4_avx512bw_byteswap,
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.valid = fletcher_4_avx512f_valid,
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.name = "avx512bw"
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};
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#endif
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2016-07-06 11:42:04 +00:00
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#endif /* defined(__x86_64) && defined(HAVE_AVX512F) */
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